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ICCAD
1999
IEEE
80views Hardware» more  ICCAD 1999»
13 years 9 months ago
Lower bound on latency for VLIW ASIP datapaths
Margarida F. Jacome, Gustavo de Veciana
ICCAD
1999
IEEE
68views Hardware» more  ICCAD 1999»
13 years 9 months ago
Throughput optimization of general non-linear computations
This paper addresses an optimal technique for throughput optimization of general non-linear data flow computations using a set of transformations. Throughput is widely recognized ...
Inki Hong, Miodrag Potkonjak, Lisa M. Guerra
ICCAD
1999
IEEE
78views Hardware» more  ICCAD 1999»
13 years 9 months ago
Interconnect scaling implications for CAD
Ron Ho, Ken Mai, Hema Kapadia, Mark Horowitz
ICCAD
1999
IEEE
74views Hardware» more  ICCAD 1999»
13 years 9 months ago
Lazy group sifting for efficient symbolic state traversal of FSMs
This paper proposes lazy group sifting for dynamic variable reordering during state traversal. The proposed method relaxes the idea of pairwise grouping of present state variables...
Hiroyuki Higuchi, Fabio Somenzi
ICCAD
1999
IEEE
120views Hardware» more  ICCAD 1999»
13 years 9 months ago
Design and optimization of LC oscillators
We present a method for optimizing and automating component and transistor sizing for CMOS LC oscillators. We observe that the performance measures can be formulated as posynomial...
Maria del Mar Hershenson, Ali Hajimiri, Sunderaraj...
ICCAD
1999
IEEE
79views Hardware» more  ICCAD 1999»
13 years 9 months ago
Improved interconnect sharing by identity operation insertion
This paper presents an approach to reduce interconnect cost by insertion of identity operations in a CDFG. Other than previous approaches, it is based on systematic pattern analys...
Dirk Herrmann, Rolf Ernst
ICCAD
1999
IEEE
120views Hardware» more  ICCAD 1999»
13 years 9 months ago
Regularity extraction via clan-based structural circuit decomposition
Identifying repeating structural regularities in circuits allows the minimization of synthesis, optimization, and layout e orts. We introduce in this paper a novel method for ident...
Soha Hassoun, Carolyn McCreary
ICCAD
1999
IEEE
81views Hardware» more  ICCAD 1999»
13 years 9 months ago
Robust optimization based backtrace method for analog circuits
In this paper, we propose a new robust approach to signal backtrace for efficiently testing embedded analog modules in a large system. The proposed signal backtrace method is form...
Alfred V. Gomes, Abhijit Chatterjee
ICCAD
1999
IEEE
119views Hardware» more  ICCAD 1999»
13 years 9 months ago
Factoring logic functions using graph partitioning
Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic minimization is performed on the Boolean equations with no regard to physical p...
Martin Charles Golumbic, Aviad Mintz