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ICCAD
1999
IEEE
92views Hardware» more  ICCAD 1999»
9 years 3 months ago
Implicit enumeration of strongly connected components
Aiguo Xie, Peter A. Beerel
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
9 years 3 months ago
Timing-driven partitioning for two-phase domino and mixed static/domino implementations
Domino logic is a high-performance circuit configuration that is usually embedded in static logic environment and tightly coupled with the clocking scheme. In this paper, the timi...
Min Zhao, Sachin S. Sapatnekar
ICCAD
1999
IEEE
71views Hardware» more  ICCAD 1999»
9 years 3 months ago
Partial BIST insertion to eliminate data correlation
Qiushuang Zhang, Ian G. Harris
ICCAD
1999
IEEE
81views Hardware» more  ICCAD 1999»
9 years 3 months ago
Modeling design constraints and biasing in simulation using BDDs
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller,...
ICCAD
1999
IEEE
79views Hardware» more  ICCAD 1999»
9 years 3 months ago
A wide frequency range surface integral formulation for 3-D RLC extraction
Junfeng Wang, Johannes Tausch, Jacob K. White
ICCAD
1999
IEEE
99views Hardware» more  ICCAD 1999»
9 years 3 months ago
FunState - an internal design representation for codesign
In this paper, an internal design model called FunState (functions driven by state machines) is presented that enables the representation of different types of system components a...
Lothar Thiele, Karsten Strehl, Dirk Ziegenbein, Ro...
ICCAD
1999
IEEE
76views Hardware» more  ICCAD 1999»
9 years 3 months ago
Optimal allocation of carry-save-adders in arithmetic optimization
: Carry-save-adder(CSA) is one of the most widely used schemes for fast arithmetic in industry. This paper provides a solution to the problem of finding an optimal-timing allocatio...
Junhyung Um, Taewhan Kim, C. L. Liu
ICCAD
1999
IEEE
148views Hardware» more  ICCAD 1999»
9 years 3 months ago
SAT based ATPG using fast justification and propagation in the implication graph
In this paper we present new methods for fast justification and propagation in the implication graph (IG) which is the core data structure of our SAT based implication engine. As ...
Paul Tafertshofer, Andreas Ganz
ICCAD
1999
IEEE
90views Hardware» more  ICCAD 1999»
9 years 3 months ago
Marsh: min-area retiming with setup and hold constraints
This paper describes a polynomial time algorithm for min-area retiming for edge-triggered circuits to handle both setup and hold constraints. Given a circuit G and a target clock ...
Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K...
ICCAD
1999
IEEE
72views Hardware» more  ICCAD 1999»
9 years 3 months ago
Validation and test generation for oscillatory noise in VLSI interconnects
: Inductance of on-chip interconnects gives rise to signal overshoots and undershoots that can cause logic errors. By considering technology trends, we show that in 0.13
Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer
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