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ICCAD
1999
IEEE
92views Hardware» more  ICCAD 1999»
13 years 9 months ago
Interface and cache power exploration for core-based embedded system design
Minimizing power consumption is of paramount importance during the design of embedded (mobile computing) systems that come as systems-ona-chip, since interdependencies of design c...
Tony Givargis, Jörg Henkel, Frank Vahid
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
13 years 9 months ago
OPTIMISTA: state minimization of asynchronous FSMs for optimum output logic
The optimal state minimization problem is to select a reduced state machine having the best logic implementation over all possible state reductions and encodings. A recent algorit...
Robert M. Fuhrer, Steven M. Nowick
ICCAD
1999
IEEE
113views Hardware» more  ICCAD 1999»
13 years 9 months ago
Attractor-repeller approach for global placement
Traditionally, analytic placement used linear or quadratic wirelength objective functions. Minimizing either formulation attracts cells sharing common signals (nets) together. The...
Hussein Etawil, Shawki Areibi, Anthony Vannelli
ICCAD
1999
IEEE
67views Hardware» more  ICCAD 1999»
13 years 9 months ago
Realizable reduction for RC interconnect circuits
Interconnect reduction is an important step in the design and analysis of complex interconnects found in present-day integrated circuits. This paper presents techniques for obtain...
Anirudh Devgan, Peter R. O'Brien
ICCAD
1999
IEEE
77views Hardware» more  ICCAD 1999»
13 years 9 months ago
Virtual screening: a step towards a sparse partial inductance matrix
We extend the partial inductance concept by replacing the magnetic interaction between open filaments i and j by that between filament j and a (finite) closed loop, formed by conn...
A. J. Dammers, N. P. van der Meijs
ICCAD
1999
IEEE
82views Hardware» more  ICCAD 1999»
13 years 9 months ago
Fault modeling and simulation for crosstalk in system-on-chip interconnects
Michael Cuviello, Sujit Dey, Xiaoliang Bai, Yi Zha...
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
13 years 9 months ago
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...
ICCAD
1999
IEEE
98views Hardware» more  ICCAD 1999»
13 years 9 months ago
Buffer block planning for interconnect-driven floorplanning
This paper studies buffer block planning for interconnect-driven floorplanning in deep submicron designs. We first introduce the concept of feasible region (FR) for buffer inserti...
Jason Cong, Tianming Kong, David Zhigang Pan
ICCAD
1999
IEEE
90views Hardware» more  ICCAD 1999»
13 years 9 months ago
An implicit connection graph maze routing algorithm for ECO routing
Abstract-- ECO routing is a very important design capability in advanced IC, MCM and PCB designs when additional routings need to be made at the latter stage of the physical design...
Jason Cong, Jie Fang, Kei-Yong Khoo
ICCAD
1999
IEEE
95views Hardware» more  ICCAD 1999»
13 years 9 months ago
Dynamic power management using adaptive learning tree
Dynamic Power Management (DPM) is a technique to reduce power consumption of electronic systems by selectively shutting down idle components. The quality of the shutdown control a...
Eui-Young Chung, Luca Benini, Giovanni De Micheli