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ISQED
2006
IEEE
106views Hardware» more  ISQED 2006»
10 years 24 days ago
Parameterizable Architecture-Level SRAM Power Model Using Circuit-Simulation Backend for Leakage Calibration
We propose an accurate architecture-level power estimation method for SRAM memories. This hybrid method is composed of an analytical part for dynamic power estimation and a circui...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...
ISQED
2006
IEEE
118views Hardware» more  ISQED 2006»
10 years 24 days ago
Design of a Single Event Upset (SEU) Mitigation Technique for Programmable Devices
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
Sajid Baloch, Tughrul Arslan, Adrian Stoica
ISQED
2006
IEEE
124views Hardware» more  ISQED 2006»
10 years 24 days ago
DFM Metrics for Standard Cells
Design for Manufacturability (DFM) is becoming increasingly important as process geometries shrink. Conventional design rule pass/fail is not adequate to quantify DFM compliance. ...
Robert C. Aitken
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