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ISLPED
1999
ACM
131views Hardware» more  ISLPED 1999»
14 years 1 months ago
Challenges in clockgating for a low power ASIC methodology
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
David Garrett, Mircea R. Stan, Alvar Dean
ISLPED
1999
ACM
129views Hardware» more  ISLPED 1999»
14 years 1 months ago
Power scalable processing using distributed arithmetic
A recent trend in low power design has been the employment of reduced precision processing methods for decreasing arithmetic activity and average power dissipation. Such designs c...
Rajeevan Amirtharajah, Thucydides Xanthopoulos, An...
ISCAS
2002
IEEE
118views Hardware» more  ISCAS 2002»
14 years 2 months ago
A power-configurable bus for embedded systems
Pre-designed configurable platforms, possessing microprocessors, memories, and numerous peripherals on a single chip, are increasing in popularity in embedded system design. Platf...
Chuanjun Zhang, Frank Vahid
GLVLSI
2002
IEEE
106views VLSI» more  GLVLSI 2002»
14 years 2 months ago
A low power direct digital frequency synthesizer with 60 dBc spectral purity
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
J. M. Pierre Langlois, Dhamin Al-Khalili
ISLPED
2003
ACM
94views Hardware» more  ISLPED 2003»
14 years 2 months ago
Evolution of low power electronics and its future applications
Low power technology is impacting our society by creating the newly emerging digital consumer market, which leads to the nomadic life-style. In this paper, historical review of th...
Tsugio Makimoto, Yoshio Sakai
ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
14 years 2 months ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang
ISLPED
2003
ACM
96views Hardware» more  ISLPED 2003»
14 years 2 months ago
Effective graph theoretic techniques for the generalized low power binding problem
This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First...
Azadeh Davoodi, Ankur Srivastava
CASES
2003
ACM
14 years 2 months ago
Architectural optimizations for low-power, real-time speech recognition
The proliferation of computing technology to low power domains such as hand–held devices has lead to increased interest in portable interface technologies, with particular inter...
Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
ASAP
2003
IEEE
107views Hardware» more  ASAP 2003»
14 years 2 months ago
Energy Aware Register File Implementation through Instruction Predecode
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
José L. Ayala, Marisa Luisa López-Va...
ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
14 years 2 months ago
The design of a low power asynchronous multiplier
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
Yijun Liu, Stephen B. Furber