Sciweavers

CASES
2005
ACM
13 years 6 months ago
Energy management for commodity short-bit-width microcontrollers
Dynamic frequency scaling and dynamic voltage scaling have been developed to save power and/or energy for general purpose computing platforms and high-end embedded systems. This p...
Rony Ghattas, Alexander G. Dean
ISLPED
1997
ACM
94views Hardware» more  ISLPED 1997»
13 years 8 months ago
A gate resizing technique for high reduction in power consumption
With the advent of portable and high density microelectronic devices, the power dissipation of VLSI circuits is becoming a critical concern. In this paper, we propose a post
Patrick Girard, Christian Landrault, Serge Pravoss...
ICTAI
1997
IEEE
13 years 8 months ago
Exploiting Symbolic Techniques within Genetic Algorithms for Power Optimization
This paper proposes an optimization algorithm for reducing the power dissipation in a sequential circuit. The encoding of the different states in a Finite State Machine is modifie...
S. Chuisano, Fulvio Corno, Paolo Prinetto, Maurizi...
DAC
1995
ACM
13 years 8 months ago
Feedback, Correlation, and Delay Concerns in the Power Estimation of VLSI Circuits
With the advent of portable and high-density microelectronic devices, the power dissipation of integrated circuits has become a critical concern. Accurate and e cient power estimat...
Farid N. Najm
PACS
2000
Springer
110views Hardware» more  PACS 2000»
13 years 8 months ago
Compiler-Directed Dynamic Frequency and Voltage Scheduling
Dynamic voltage and frequency scaling has been identified as one of the most effective ways to reduce power dissipation. This paper discusses a compilation strategy that identifies...
Chung-Hsing Hsu, Ulrich Kremer, Michael S. Hsiao
ASAP
2004
IEEE
115views Hardware» more  ASAP 2004»
13 years 8 months ago
A Low-Power Carry Skip Adder with Fast Saturation
In this paper, we present the design of a carry skip adder that achieves low power dissipation and high-performance operation. The carry skip adder's delay and power dissipat...
Michael J. Schulte, Kai Chirca, John Glossner, Hao...
DAC
1994
ACM
13 years 9 months ago
Statistical Estimation of the Switching Activity in Digital Circuits
Higher levels of integration have led to a generation of integrated circuits for which power dissipation and reliability are major design concerns. In CMOS circuits, both of these ...
Michael G. Xakellis, Farid N. Najm
ICCAD
1994
IEEE
121views Hardware» more  ICCAD 1994»
13 years 9 months ago
A cell-based power estimation in CMOS combinational circuits
In this paper we present a power dissipation model considering the charging/discharging of capacitance at the gate output node as well as internal nodes, and capacitance feedthrou...
Jiing-Yuan Lin, Tai-Chien Liu, Wen-Zen Shen
ICCAD
1994
IEEE
61views Hardware» more  ICCAD 1994»
13 years 9 months ago
Simultaneous driver and wire sizing for performance and power optimization
In this paper, we study the simultaneousdriver and wire sizing (SDWS) problem under two objective functions: (i) delay minimization only, or (ii) combined delay and power dissipat...
Jason Cong, Cheng-Kok Koh
ISLPED
1996
ACM
121views Hardware» more  ISLPED 1996»
13 years 9 months ago
A low power high performance switched-current multiplier
This paper presents an accurate switched-current multiplier, designed for 3.3V supply voltage, performing 0.625M multiplications per second with a maximum nonlinearity of 0.94%. Th...
Domine Leenaerts, G. H. M. Joordens, Johannes A. H...