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CAV
2008
Springer
131views Hardware» more  CAV 2008»
11 years 10 months ago
Validating High-Level Synthesis
The growing design-productivity gap has made designers shift toward using high-level languages like C, C++ and Java to do system-level design. High-Level Synthesis (HLS) is the pro...
Sudipta Kundu, Sorin Lerner, Rajesh Gupta
ISLPED
1995
ACM
103views Hardware» more  ISLPED 1995»
11 years 11 months ago
Information theoretic measures of energy consumption at register transfer level
- The problem of estimating the energy consumption at register transfer level is addressed from an information theoretical point of view. It is shown that the average switching act...
Diana Marculescu, Radu Marculescu, Massoud Pedram
FDL
2007
IEEE
12 years 2 days ago
Transaction Level Modelling: A reflection on what TLM is and how TLMs may be classified
Transaction-level modelling (TLM) is a poorlyterm, promising a level of abstraction like RTL (register transfer level), where the key feature is a `transaction'. But unlike r...
Mark Burton, James Aldis, Robert Günzel, Wolf...
ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
12 years 1 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
ISCAS
2005
IEEE
166views Hardware» more  ISCAS 2005»
12 years 1 months ago
Extending SystemC to support mixed discrete-continuous system modeling and simulation
—Systems on chip are more and more heterogeneous and include software, analog/RF and digital hardware, and non-electronic components such as sensors or actuators. The design and ...
Alain Vachoux, Christoph Grimm, Karsten Einwich
FPL
2007
Springer
115views Hardware» more  FPL 2007»
12 years 2 months ago
Hardware/Software Process Migration and RTL Simulation
This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...
Aric D. Blumer, Cameron D. Patterson
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
12 years 5 months ago
Platform-based resource binding using a distributed register-file microarchitecture
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
Jason Cong, Yiping Fan, Wei Jiang
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