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FTEDA
2007
78views more  FTEDA 2007»
9 years 10 months ago
Design Automation of Real-Life Asynchronous Devices and Systems
The number of gates on a chip is quickly growing toward and beyond the one billion mark. Keeping all the gates running at the beat of a single or a few rationally related clocks i...
Alexander Taubin, Jordi Cortadella, Luciano Lavagn...
DAGSTUHL
2004
10 years 3 days ago
Requirements for and Design of a Processor with Predictable Timing
Abstract. This paper introduces a set of design principles that aim to make processor architectures amenable to static timing analysis. Based on these principles, we give a design ...
Christoph Berg, Jakob Engblom, Reinhard Wilhelm
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
10 years 2 months ago
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Sto...
ASPDAC
2006
ACM
123views Hardware» more  ASPDAC 2006»
10 years 2 months ago
Efficient static timing analysis using a unified framework for false paths and multi-cycle paths
- We propose a framework to unify the process of false paths and multi-cycle paths in static timing analysis (STA). We use subgraphs attached with timing constraints to represent f...
Shuo Zhou, Bo Yao, Hongyu Chen, Yi Zhu, Chung-Kuan...
DATE
2000
IEEE
113views Hardware» more  DATE 2000»
10 years 3 months ago
Static Timing Analysis of Embedded Software on Advanced Processor Architectures
This paper examines several techniques for static timing analysis. In detail, the first part of the paper analyzes the connection of prediction accuracy (worst case execution tim...
André Hergenhan, Wolfgang Rosenstiel
WORDS
2002
IEEE
10 years 3 months ago
A Static Timing Analysis Environment Using Java Architecture for Safety Critical Real-Time Systems
Certainly, in hard real-time systems, it is reasonable to argue that no hard real-time threads should behave in an unpredictable way and that schedulability should be guaranteed b...
Erik Yu-Shing Hu, Guillem Bernat, Andy J. Wellings
ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
10 years 3 months ago
Timing Analysis of Embedded Software for Speculative Processors
Static timing analysis of embedded software is important for systems with hard real-time constraints. To accurately estimate time bounds, it is essential to model the underlying m...
Abhik Roychoudhury, Xianfeng Li, Tulika Mitra
CODES
2002
IEEE
10 years 3 months ago
Worst-case performance analysis of parallel, communicating software processes
In this paper we present a method to perform static timing analysis of SystemC models, that describe parallel, communicating software processes.The paper combines a worstcase exec...
Axel Siebenborn, Oliver Bringmann, Wolfgang Rosens...
ISPD
2003
ACM
151views Hardware» more  ISPD 2003»
10 years 4 months ago
Capturing crosstalk-induced waveform for accurate static timing analysis
We propose a method to capture crosstalk-induced noisy waveform for crosstalk-aware static timing analysis. The effects of capacitive coupling noise on timing are conventionally m...
Masanori Hashimoto, Yuji Yamada, Hidetoshi Onodera
ISCAS
2005
IEEE
131views Hardware» more  ISCAS 2005»
10 years 4 months ago
Timing yield estimation using statistical static timing analysis
—As process variations become a significant problem in deep sub-micron technology, a shift from deterministic static timing analysis to statistical static timing analysis for hig...
Min Pan, Chris C. N. Chu, Hai Zhou
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