FPGA   2009 International ACM Symposium on Field-Programmable Gate Arrays
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A 17ps time-to-digital converter implemented in 65nm FPGA technology
This paper presents a new architecture for time-to-digital conversion enabling a time resolution of 17ps over a range of 50ns with a conversion rate of 20MS/s. The proposed archit...
Claudio Favi, Edoardo Charbon
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