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ASPDAC
2012
ACM
241views Hardware» more  ASPDAC 2012»
14 years 2 months ago
Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems
Abstract— Integrating optical interconnects into the nextgeneration multi-/many-core architecture has been considered a viable solution to addressing the limitations in throughpu...
Yan Zheng, Peter Lisherness, Saeed Shamshiri, Amir...
ASPDAC
2012
ACM
281views Hardware» more  ASPDAC 2012»
14 years 2 months ago
Abstract system-level models for early performance and power exploration
Andreas Gerstlauer, Suhas Chakravarty, Manan Kathu...
ASPDAC
2012
ACM
253views Hardware» more  ASPDAC 2012»
14 years 2 months ago
An integrated and automated memory optimization flow for FPGA behavioral synthesis
Behavioral synthesis tools have made significant progress in compiling high-level programs into register-transfer level (RTL) specifications. But manually rewriting code is still ...
Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong
ASPDAC
2012
ACM
290views Hardware» more  ASPDAC 2012»
14 years 2 months ago
CODA: A concurrent online delay measurement architecture for critical paths
With technology scaling, integrated circuits behave more unpredictably due to process variation, environmental changes and aging effects. Various variation-aware and adaptive desi...
Yubin Zhang, Haile Yu, Qiang Xu
ASPDAC
2012
ACM
241views Hardware» more  ASPDAC 2012»
14 years 2 months ago
On error modeling of electrical bugs for post-silicon timing validation
—There is great demand for an accurate and scalable metric to evaluate the functional stimuli, testbench checkers, and DfD (Design-for-Debug) structures used in post-silicon timi...
Ming Gao, Peter Lisherness, Kwang-Ting Cheng, Jing...