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RECONFIG
2015
IEEE
24views VLSI» more  RECONFIG 2015»
9 years 11 months ago
Multiple contexts in a multi-ported VLIW register file implementation
Joost Hoozemans, Jens Johansen, Jeroen van Straten...
RECONFIG
2015
IEEE
36views VLSI» more  RECONFIG 2015»
9 years 11 months ago
Accelerating the construction of BRIEF descriptors using an FPGA-based architecture
Abstract—BRIEF emerged as a novel alternative to conventional floating-point-based descriptors such as SIFT or SURF. In contrast to these descriptors, BRIEF is a descriptor repr...
Roberto de Lima, José Martínez-Carra...
RECONFIG
2015
IEEE
27views VLSI» more  RECONFIG 2015»
9 years 11 months ago
A sparse VLIW instruction encoding scheme compatible with generic binaries
—Very Long Instruction Word (VLIW) processors are commonplace in embedded systems due to their inherent lowpower consumption as the instruction scheduling is performed by the com...
Anthony Brandon, Joost Hoozemans, Jeroen van Strat...
347
Voted
RECOMB
2015
Springer
9 years 11 months ago
A Symmetric Length-Aware Enrichment Test
Young et al. [14] showed that due to gene length bias the popular Fisher Exact Test should not be used to study the association between a group of differentially expressed (DE) ge...
David Manescu, Uri Keich