Sciweavers

ASPDAC
2008
ACM
87views Hardware» more  ASPDAC 2008»
15 years 9 months ago
An efficient performance improvement method utilizing specialized functional units in Behavioral Synthesis
This paper proposes a novel Behavioral Synthesis method that improves performance of synthesized circuits utilizing specialized functional units effectively. Specialized functional...
Tsuyoshi Sadakata, Yusuke Matsunaga
ASPDAC
2008
ACM
115views Hardware» more  ASPDAC 2008»
15 years 9 months ago
GECOM: Test data compression combined with all unknown response masking
This paper introduces GECOM technology, a novel test compression method with seamless integration of test GE
Youhua Shi, Nozomu Togawa, Masao Yanagisawa, Tatsu...
ASPDAC
2008
ACM
154views Hardware» more  ASPDAC 2008»
15 years 9 months ago
Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching
Meeting power and performance requirement is a challenging task in high speed ALUs. Supply voltage scaling is promising because it reduces both switching and active power but it al...
Swaroop Ghosh, Kaushik Roy
ASPDAC
2008
ACM
101views Hardware» more  ASPDAC 2008»
15 years 9 months ago
Interconnect modeling for improved system-level design optimization
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...
ASPDAC
2008
ACM
90views Hardware» more  ASPDAC 2008»
15 years 9 months ago
Vertical via design techniques for multi-layered P/G networks
- In multi-layered power/ground (P/G) networks, to connect the whole network together, vertical vias are usually placed at intersections between metal wires of adjoining layers. In...
Shuai Li, Jin Shi, Yici Cai, Xianlong Hong