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ASPDAC
2008
ACM
129views Hardware» more  ASPDAC 2008»
15 years 9 months ago
Clock tree synthesis with data-path sensitivity matching
This paper investigates methods for minimizing the impact of process variation on clock skew using buffer and wire sizing. While most papers on clock trees ignore data-path circuit...
Matthew R. Guthaus, Dennis Sylvester, Richard B. B...
ASPDAC
2008
ACM
122views Hardware» more  ASPDAC 2008»
15 years 9 months ago
LP based white space redistribution for thermal via planning and performance optimization in 3D ICs
: Thermal issue is a critical challenge in 3D IC circuit design. Incorporating thermal vias into 3D IC is a promising way to mitigate thermal issues by lowering down the thermal re...
Xin Li, Yuchun Ma, Xianlong Hong, Sheqin Dong, Jas...
ASPDAC
2008
ACM
86views Hardware» more  ASPDAC 2008»
15 years 9 months ago
An MILP-based wire spreading algorithm for PSM-aware layout modification
Phase shifting mask (PSM) is a promising resolution enhancement technique, which is used in the deep sub-wavelength lithography of the VLSI fabrication process. However, applying ...
Ming-Chao Tsai, Yung-Chia Lin, Ting-Chi Wang
ASPDAC
2008
ACM
127views Hardware» more  ASPDAC 2008»
15 years 9 months ago
A multicycle communication architecture and synthesis flow for Global interconnect Resource Sharing
In deep submicron technology, wire delay is no longer negligible and is gradually dominating the system latency. Some state-of-the-art architectural synthesis flows adopt the distr...
Wei-Sheng Huang, Yu-Ru Hong, Juinn-Dar Huang, Ya-S...