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ISLPED
1995
ACM
70views Hardware» more  ISLPED 1995»
15 years 8 months ago
Transformation and synthesis of FSMs for low-power gated-clock implementation
We present a technique that automatically synthesizes nite state machines with gated clocks to reduce the power dissipation of the nal implementation. We describe a new transfor...
Luca Benini, Giovanni De Micheli
ISLPED
1995
ACM
78views Hardware» more  ISLPED 1995»
15 years 8 months ago
Low voltage analog circuits using standard CMOS technology
Phillip E. Allen, Benjamin J. Blalock, Gabriel A. ...
ISLPED
1995
ACM
80views Hardware» more  ISLPED 1995»
15 years 8 months ago
Techniques for fast circuit simulation applied to power estimation of CMOS circuits
We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses s...
Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. K...
150
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ISLPED
1995
ACM
193views Hardware» more  ISLPED 1995»
15 years 8 months ago
Transistor sizing for minimizing power consumption of CMOS circuits under delay constraint
We consider the problem of transistor sizing in a static CMOS layout to minimizethe power consumption of the circuit subject to a given delay constraint. Based on our characteriza...
Manjit Borah, Robert Michael Owens, Mary Jane Irwi...
ISLPED
1995
ACM
134views Hardware» more  ISLPED 1995»
15 years 8 months ago
High-throughput and low-power DSP using clocked-CMOS circuitry
We argue that the clocked-CMOS (C2MOS) circuit family provides a very high throughput and low power alternative to other existing circuit techniques for the fast developing market...
Manjit Borah, Robert Michael Owens, Mary Jane Irwi...