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ICCD
1995
IEEE
119views Hardware» more  ICCD 1995»
15 years 8 months ago
Extraction of finite state machines from transistor netlists by symbolic simulation
– This paper describes a new technique for extracting clock-level finite state machines(FSMs) from transistor netlists using symbolic simulation. The transistor netlist is prepr...
Manish Pandey, Alok Jain, Randal E. Bryant, Derek ...
ICCD
1995
IEEE
83views Hardware» more  ICCD 1995»
15 years 8 months ago
Concurrent timing optimization of latch-based digital systems
Many design techniques have been proposed to optimize the performance of a digital system implemented in a given technology. Each of these techniques can be advantageous in partic...
Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III, C...
ICCD
1995
IEEE
51views Hardware» more  ICCD 1995»
15 years 8 months ago
Implementing a STARI chip
STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2 CMOS process. In a...
Mark R. Greenstreet
IPPS
1997
IEEE
15 years 8 months ago
Designing Efficient Distributed Algorithms Using Sampling Techniques
In this paper we show the power of sampling techniques in designing efficient distributed algorithms. In particular, we show that using sampling techniques, on some networks, sele...
Sanguthevar Rajasekaran, David S. L. Wei
IPPS
1997
IEEE
15 years 8 months ago
View Caching: Efficient Software Shared Memory for Dynamic Computations
Software distributed shared memory (DSM) techniques, while effective on applications with coarse-grained sharing, yield poor performance for the fine-grained sharing encountered i...
Vijay Karamcheti, Andrew A. Chien