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110
Voted
ASPDAC
2000
ACM
102views Hardware» more  ASPDAC 2000»
15 years 7 months ago
Multi-clock path analysis using propositional satisfiability
We present a satisfiability based multi-clock path analysis method. The method uses propositional satisfiability (SAT) in the detection of multi-clock paths. We show a method to re...
Kazuhiro Nakamura, Shinji Maruoka, Shinji Kimura, ...
122
Voted
ASPDAC
2000
ACM
133views Hardware» more  ASPDAC 2000»
15 years 7 months ago
A VLSI implementation of the blowfish encryption/decryption algorithm
We propose an efficient hardware architecture for the Blowfish algorithm [1]. The speed is up to 4 bit/clock, which is 9 times faster than a Pentium. By applying operator-reschedul...
Michael C.-J. Lin, Youn-Long Lin
160
Voted
ASPDAC
2000
ACM
109views Hardware» more  ASPDAC 2000»
15 years 7 months ago
A technique for QoS-based system partitioning
Quality of service (QoS) has been an important topic of many research communities. Combined with an advanced and retargetable compiler, variability of applicationsspecific very lar...
Johnson S. Kin, Chunho Lee, William H. Mangione-Sm...
143
Voted
ASPDAC
2000
ACM
157views Hardware» more  ASPDAC 2000»
15 years 7 months ago
An application specific Java processor with reconfigurabilities
The paper presents an application specific Java processor including reconfigurabilities, which is a DLX like pipeline processor with 5 stages and executes Java byte codes directly....
Shinji Kimura, Hiroyuki Kida, Kazuyoshi Takagi, Ta...
106
Voted
ASPDAC
2000
ACM
96views Hardware» more  ASPDAC 2000»
15 years 7 months ago
A programmable built-in self-test core for embedded memories
Testing embedded memories is becoming an industry-wide concern with the advent of deep-submicron technology and system-on-chip applications. We present a prototype chip for a progr...
Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu