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FDL
2004
IEEE
15 years 7 months ago
Designing for dynamic partially reconfigurable FPGAs with SystemC and OSSS
This paper presents a new approach to design embedded systems based on dynamic partial reconfigurable FPGAs. The approach is intended to allow designing of systems with runtime re...
Andreas Schallenberg, Frank Oppenheimer, Wolfgang ...
CODES
2006
IEEE
15 years 7 months ago
Phase guided sampling for efficient parallel application simulation
Simulating chip-multiprocessor systems (CMP) can take a long time. For single-threaded workloads, earlier work has shown the utility of phase analysis, that is identification of r...
Jeffrey Namkung, Dohyung Kim, Rajesh K. Gupta, Igo...
FDL
2004
IEEE
15 years 7 months ago
UML System-Level Analysis and Design of Secure Communication Schemes for Embedded Systems
In this work we develop a secure communication protocol in the context of a Remote Meter Reading (RMR) System. We first analyze existing standards in secure communication (e.g. IP...
Mauro Prevostini, Giuseppe Piscopo, I. Stefanini
FDL
2004
IEEE
15 years 7 months ago
Reuse of SML module system for the B language
In this paper, we are concerned with studying the semantic of the B modularity. We reuse the Harper-Lillibridge-Leroy (HLL) module system. This system implements an SML like module...
Dorian Petit, Vincent Poirriez, Georges Mariano
164
Voted
CODES
2006
IEEE
15 years 7 months ago
Application specific forwarding network and instruction encoding for multi-pipe ASIPs
Small area and code size are two critical design issues in most of embedded system designs. In this paper, we tackle these issues by customizing forwarding networks and instructio...
Swarnalatha Radhakrishnan, Hui Guo, Sri Parameswar...