134
Voted
DELTA
2004
IEEE
15 years 7 months ago
2004
IEEE
Systems-on-Chip (SoCs) are heterogeneous by nature as they may integrate digital, analog, RF hardware as well as software components or non electrical parts such as sensors or act...
119
Voted
DELTA
2004
IEEE
15 years 7 months ago
2004
IEEE
Manufacturing test of chips made of multiple IP cores requires different techniques if ATE is used. As scan chains are commonly used as access paths to the DUT, ATE architectures ...
128
Voted
DELTA
2004
IEEE
15 years 7 months ago
2004
IEEE
This paper is concerned with the study of human electroencephalogram (EEG) signal of an epileptic person. In classical EEG analysis rhythms in different bands have often been assu...
142
Voted
CCECE
2006
IEEE
15 years 7 months ago
2006
IEEE
This paper presents a forgetting factor scheme for variable step-size affine projection algorithms (APA). The proposed scheme uses a forgetting processed input matrix as the projec...
