132
Voted
CAV
2006
Springer
15 years 7 months ago
2006
Springer
We present an approach for applying symmetry reduction techniques to probabilistic model checking, a formal verification method for the quantitative analysis of systems with stocha...
137
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DATE
2004
IEEE
15 years 7 months ago
2004
IEEE
Functional verification is widely acknowledged as a major bottleneck in microprocessor design. While early work on specification driven functional test program generation has prop...
DATE
2004
IEEE
15 years 7 months ago
2004
IEEE
In this paper, we study the net and pin distribution problem for global routing targeting three dimensional packaging layout via System-on-Package (SOP). The routing environment f...
132
Voted
CAV
2006
Springer
15 years 7 months ago
2006
Springer
In automated synthesis, we transform a specification into a system that is guaranteed to satisfy the specification. In spite of the rich theory developed for system synthesis, litt...
109
Voted
CAV
2006
Springer
15 years 7 months ago
2006
Springer