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CF
2007
ACM
15 years 9 months ago
Accelerating memory decryption and authentication with frequent value prediction
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
Weidong Shi, Hsien-Hsin S. Lee
CF
2007
ACM
15 years 9 months ago
Converting massive TLP to DLP: a special-purpose processor for molecular orbital computations
We propose an application specific processor for computational quantum chemistry. The kernel of interest is the computation of electron repulsion integrals (ERIs), which vary in c...
Tirath Ramdas, Gregory K. Egan, David Abramson, Ki...
CF
2007
ACM
15 years 9 months ago
General floorplan for reversible quantum-dot cellular automata
This paper presents the Collapsed Bennett Layout, a general purpose floorplan for reversible quantum-dot cellular automata (QCA) circuits. In order to exploit the full density and...
Sarah E. Murphy, Erik DeBenedictis, Peter M. Kogge
CF
2007
ACM
15 years 9 months ago
Identifying potential parallelism via loop-centric profiling
The transition to multithreaded, multi-core designs places a greater responsibility on programmers and software for improving performance; thread-level parallelism (TLP) will be i...
Tipp Moseley, Daniel A. Connors, Dirk Grunwald, Ra...
CF
2007
ACM
15 years 9 months ago
Unified microprocessor core storage
The organization and management of microprocessor storage structures (e.g., L1 caches, TLBs, etc.) is critical to the performance and energy consumption of the microprocessor. We ...
Albert Meixner, Daniel J. Sorin