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DAC
2006
ACM
16 years 8 months ago
An adaptive FPGA architecture with process variation compensation and reduced leakage
Process induced threshold voltage variations bring about fluctuations in circuit delay, that affect the FPGA timing yield. We propose an adaptive FPGA architecture that compensate...
Georges Nabaa, Navid Azizi, Farid N. Najm
DAC
2006
ACM
16 years 8 months ago
Systematic temperature sensor allocation and placement for microprocessors
Modern high performance processors employ advanced techniques for thermal management, which rely on accurate readings of on-die thermal sensors. As the importance of thermal effec...
Rajarshi Mukherjee, Seda Ogrenci Memik
DAC
2006
ACM
16 years 8 months ago
Constraint-driven floorplan repair
Abstracting with credit is permitted. To copy otherwise, to republish, to post on servers, to redistribute to lists, or to use any component of this work in other works requires pr...
Michael D. Moffitt, Aaron N. Ng, Igor L. Markov, M...
DAC
2006
ACM
16 years 8 months ago
MARS-C: modeling and reduction of soft errors in combinational circuits
Due to the shrinking of feature size and reduction in supply voltages, nanoscale circuits have become more susceptible to radiation induced transient faults. In this paper, we pre...
Natasa Miskov-Zivanov, Diana Marculescu
DAC
2006
ACM
16 years 8 months ago
DAG-aware AIG rewriting a fresh look at combinational logic synthesis
This paper presents a technique for preprocessing combinational logic before technology mapping. The technique is based on the representation of combinational logic using And-Inve...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...