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139
Voted
DAC
2000
ACM
16 years 8 months ago
Predicting performance potential of modern DSPs
Naji Ghazal, A. Richard Newton, Jan M. Rabaey
DAC
2000
ACM
16 years 8 months ago
Memory aware compilation through accurate timing extraction
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
DAC
2000
ACM
16 years 8 months ago
METRICS: a system architecture for design process optimization
We describe METRICS, a system to recover design productivity via new infrastructure for design process optimization. METRICS seeks to treat system design and implementation as a s...
Stephen Fenstermaker, David George, Andrew B. Kahn...
DAC
2000
ACM
16 years 8 months ago
Compiling Esterel into sequential code
This paper presents a novel compiler for Esterel, a concurrent synchronous imperative language. It generates fast, small object code by compiling away concurrency, producing a sin...
Stephen A. Edwards
DAC
2000
ACM
16 years 8 months ago
Unifying behavioral synthesis and physical design
eously demand shorter and less costly design cycles. Designing at higher levels of abstraction makes both objectives achievable, but enabling techniques like behavioral synthesis h...
William E. Dougherty, Donald E. Thomas