Spatially-correlated intra-die process variations result in significant core-to-core frequency variations in chip-multiprocessors. An analytical model for frequency island chip-mu...
This paper presents a hybrid CNT/CMOS chemical sensor system that comprises of a carbon nanotube sensor array and a CMOS interface chip. The full system, including the sensor, con...
Taeg Sang Cho, Kyeong-jae Lee, Jing Kong, Anantha ...
Integrated circuits with bounded lifetimes can have many business advantages. We give some simple examples of m ods to enforce tunable expiration dates for chips using nanom reliab...
Future SoCs will contain multiple cores. For workloads with significant parallelism, prior work has shown the benefit of many small, multi-threaded, scalar cores. For workloads th...
A fundamental problem in timing-driven physical synthesis is the reduction of critical paths in a design. In this work, we propose a powerful new technique that moves (and can als...
Michael D. Moffitt, David A. Papa, Zhuo Li, Charle...