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    DAC
    2008
    ACM
    191views Computer Architecture» more  DAC 2008»
    Functional test selection based on unsupervised support vector analysis
    16 years 8 months ago
    Functional test selection based on unsupervised support vector analysis
    Download  www.cs.bris.ac.uk
    Extensive software-based simulation continues to be the mainstream methodology for functional verification of designs. To optimize the use of limited simulation resources, coverag...
    Onur Guzey, Li-C. Wang, Jeremy R. Levitt, Harry Fo...
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    DAC
    2008
    ACM
    103views Computer Architecture» more  DAC 2008»
    Scalable min-register retiming under timing and initializability constraints
    16 years 8 months ago
    Scalable min-register retiming under timing and initializability constraints
    Download  www.eecs.berkeley.edu
    Aaron P. Hurst, Alan Mishchenko, Robert K. Brayton
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    DAC
    2008
    ACM
    138views Computer Architecture» more  DAC 2008»
    Parameterized timing analysis with general delay models and arbitrary variation sources
    16 years 8 months ago
    Parameterized timing analysis with general delay models and arbitrary variation sources
    Download  www.eecg.toronto.edu
    Many recent techniques for timing analysis under variability, in which delay is an explicit function of underlying parameters, may be described as parameterized timing analysis. T...
    Khaled R. Heloue, Farid N. Najm
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    DAC
    2008
    ACM
    98views Computer Architecture» more  DAC 2008»
    Robust chip-level clock tree synthesis for SOC designs
    16 years 8 months ago
    Robust chip-level clock tree synthesis for SOC designs
    Download  www.cerc.utexas.edu
    A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
    Anand Rajaram, David Z. Pan
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    DAC
    2008
    ACM
    142views Computer Architecture» more  DAC 2008»
    A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
    16 years 8 months ago
    A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
    Download  www.taktak.org
    In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
    Zhen Zhang, Alain Greiner, Sami Taktak
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