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95
Voted
DFT
1997
IEEE
1997
IEEE
Exploiting High-Level Descriptions for Circuits Fault Tolerance Assessments
Real-time Traffic| Added | 06 Aug 2010 |
| Updated | 06 Aug 2010 |
| Type | Conference |
| Year | 1997 |
| Where | DFT |
| Authors | Alfredo Benso, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Jaan Raik, Raimund Ubar |
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