Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

109

ASAP
2003
IEEE

97views Hardware» more ASAP 2003»

Modular Multiplication for FPGA Implementation of the IDEA Block Cipher

15 years 6 months ago

Modular Multiplication for FPGA Implementation of the IDEA Block Cipher

Download hal.archives-ouvertes.fr

Jean-luc Beauchat

Real-time Traffic

ASAP 2003 | Hardware |

claim paper

Related Content

» 64bit Block ciphers hardware implementations and comparison analysis

» An FPGA implementation and performance evaluation of the Serpent block cipher

» Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection

» Parametric Secure and Compact Implementation of RSA on FPGA

» FPGA Implementation of Modular Exponentiation

» Efficient pipelining for modular multiplication architectures in prime fields

» A KaratsubaBased Montgomery Multiplier

» Hardware Implementation of Efficient Modified Karatsuba Multiplier Used in Elliptic Curves

Post Info
More Details (n/a)

Added	23 Aug 2010
Updated	23 Aug 2010
Type	Conference
Year	2003
Where	ASAP
Authors	Jean-luc Beauchat

Comments (0)