Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs

This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state assignment technique, based on fuzzy codes, that is combined with the replacement (encoding) of the FSM input vectors. It also shows how FSMs with dynamically modifiable functionality can be constructed and then implemented in commercially available FPGAs. The results of experiments have shown that FSMs with the proposed architecture can be implemented using less hardware resources, such as the number of FPGA configurable logic blocks (CLB), while at the same time extending their functional capabilities.

• Type: Conference
• Year: 2000
• Where: FPL
• Authors: Valery Sklyarov
• Keywords: Finite State Machines, FPL 2000, FSM Input Vectors, Hardware, State Assignment Technique