Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
PDF Tools
Image Tools
Text Tools
OCR Tools
Symbol and Emoji Tools
On-screen Keyboard
Latex Math Equation to Image
Smart IPA Phonetic Keyboard
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
Free Online Productivity Tools
i2Speak
i2Symbol
i2OCR
iTex2Img
iWeb2Print
iWeb2Shot
i2Type
iPdf2Split
iPdf2Merge
i2Bopomofo
i2Arabic
i2Style
i2Image
i2PDF
iLatex2Rtf
Sci2ools
94
Voted
ASPDAC
2011
ACM
183
views
Hardware
»
more
ASPDAC 2011
»
Multi-core parallel simulation of System-level Description Languages
14 years 6 months ago
Download
www.aspdac.com
Rainer Dömer, Weiwei Chen, Xu Han, Andreas Ge
Real-time Traffic
ASPDAC 2011
|
Hardware
|
claim paper
Related Content
»
Efficient Simulation of SynthesisOriented System Level Designs
»
Design and Power Analysis in SysteC of an I2C Bus Driver
»
Software Synthesis for System Level Design Using Process Execution Trees
»
The CoGenT Project CoGenerating Compilers and Simulators for Dynamically Compiled Language...
»
GAMEHDL Implementation of Evolutionary Algorithms Using Hardware Description Languages
»
Parallel Simulation of TCPIP Using TeD
»
Component Technology for HighPerformance Scientific Simulation Software
»
A Framework for Performance Analysis of Parallel Discrete Event Simulators
»
Overview of Hydra A Concurrent Language for Synchronous Digital Circuit Design
more »
Post Info
More Details (n/a)
Added
24 Aug 2011
Updated
24 Aug 2011
Type
Journal
Year
2011
Where
ASPDAC
Authors
Rainer Dömer, Weiwei Chen, Xu Han, Andreas Gerstlauer
Comments
(0)
Researcher Info
Hardware Study Group
Computer Vision