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GLVLSI
2007
IEEE

Analyzing and modeling process balance for sub-threshold circuit design

15 years 3 months ago
Analyzing and modeling process balance for sub-threshold circuit design
Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where GLVLSI
Authors Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun
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