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GLVLSI
2007
IEEE

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Analyzing and modeling process balance for sub-threshold circuit design

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Analyzing and modeling process balance for sub-threshold circuit design

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Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun

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Added	02 Jun 2010
Updated	02 Jun 2010
Type	Conference
Year	2007
Where	GLVLSI
Authors	Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun

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