Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

83

EGH
2007
Springer

110views Computer Graphics» more EGH 2007»

A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors

15 years 9 months ago

A hardware redundancy and recovery mechanism for reliable scientific computation on graphics processors

Download www.cs.virginia.edu

Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron

Real-time Traffic

Computer Graphics | EGH 2007 |

claim paper

Related Content

» Conjoined Pipeline Enhancing Hardware Reliability and Performance through Organized Pipeli...

» Using replication and checkpointing for reliable task management in computational Grids

» Superscalar Processor Performance Enhancement through Reliable Dynamic Clock Frequency Tun...

» Understanding software approaches for GPGPU reliability

» Automatic InstructionLevel SoftwareOnly Recovery

» Reunion ComplexityEffective Multicore Redundancy

» FaultTolerant BPEL Workflow Execution via CloudAware Recovery Policies

» Skewed redundancy

» Reliable multiprocessor systemonchip synthesis

Post Info
More Details (n/a)

Added	07 Jun 2010
Updated	07 Jun 2010
Type	Conference
Year	2007
Where	EGH
Authors	Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron

Comments (0)