On the Fault Testing for Reversible Circuits

This paper shows that it is NP-hard to generate a minimum complete test set for stuck-at faults on the wires of a reversible circuit. We also show non-trivial lower bounds for the size of a minimum complete test set.

• Type: Conference
• Year: 2007
• Where: ISAAC
• Authors: Satoshi Tayu, Shigeru Ito, Shuichi Ueno
• Keywords: ISAAC 2007, Minimum Complete Test, Non-trivial Lower Bounds, Test Set