Dynamically Reconfigurable Architecture for Image Processor Applications

This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution models for reconfigurable platforms, and demonstrates the advantage of dynamic reconfiguration in the new implementation of a neighborhood image processor, called DRIP. It achieves a realtime performance, which is 3 times faster than its pipelined nonreconfigurable version Keywords Reconfigurable architecture, image processing, FPGA

• Type: Conference
• Year: 1999
• Where: DAC
• Authors: Alexandro M. S. Adário, Eduardo L. Roehe, Sergio Bampi
• Keywords: Computer Architecture, DAC 1999, Dynamic Hardware Reconfiguration, Keywords Reconfigurable Architecture, Neighborhood Image Processor