Sciweavers
Explore
Publications
Books
Software
Tutorials
Presentations
Lectures Notes
Datasets
Labs
Conferences
Community
Upcoming
Conferences
Top Ranked Papers
Most Viewed Conferences
Conferences by Acronym
Conferences by Subject
Conferences by Year
Tools
PDF Tools
Image Tools
Text Tools
OCR Tools
Symbol and Emoji Tools
On-screen Keyboard
Latex Math Equation to Image
Smart IPA Phonetic Keyboard
Community
Sciweavers
About
Terms of Use
Privacy Policy
Cookies
Free Online Productivity Tools
i2Speak
i2Symbol
i2OCR
iTex2Img
iWeb2Print
iWeb2Shot
i2Type
iPdf2Split
iPdf2Merge
i2Bopomofo
i2Arabic
i2Style
i2Image
i2PDF
iLatex2Rtf
Sci2ools
95
click to vote
FPL
2010
Springer
103
views
Hardware
»
more
FPL 2010
»
Dynamically Reconfigurable Vision-Chip Architecture
15 years 1 months ago
Download
conferenze.dei.polimi.it
Maki Yasuda, Minoru Watanabe
Real-time Traffic
FPL 2010
|
Hardware
|
claim paper
Related Content
»
Multilevel reconfigurable architectures in the switch model
»
Woolcano An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Vir...
»
System design of active basestations based on dynamically reconfigurable hardware
»
Hyperreconfigurable Architectures for Fast Run Time Reconfiguration
»
Dynamically Reconfigurable Architecture for Image Processor Applications
»
Software Reconfiguration Patterns for Dynamic Evolution of Software Architectures
»
SoftwareConfigware Implementation of Combinatorial Algorithms
»
StyleBased Refinement of Dynamic Software Architectures
»
Parallel Processing Architectures for Reconfigurable Systems
more »
Post Info
More Details (n/a)
Added
11 Feb 2011
Updated
11 Feb 2011
Type
Journal
Year
2010
Where
FPL
Authors
Maki Yasuda, Minoru Watanabe
Comments
(0)
Researcher Info
Hardware Study Group
Computer Vision