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VLSID
2003
IEEE

Extending Platform-Based Design to Network on Chip Systems

15 years 8 days ago
Extending Platform-Based Design to Network on Chip Systems
Exploitation of silicon capacity will require improvements in design productivity and more scalable system paradigms. Asynchronous message passing networks on chip (NOC) have been proposed as backbones for billion-transistor ASICs. We present a novel layered backbone-platform-system (BPS) design methodology for development of network-on-chip based products. It combines and extends the distributed, parallel, embedded and platform-based design concepts in order to manage the diversity and complexity of NOCbased systems. The reuse of communication principles in various platforms, the reuse of platforms in product differentiation, and system-level decision-support methods are the cornerstones of our methodology. The presented mappability estimation and workload simulations demonstrate the feasibility of such methods.
Juha-Pekka Soininen, Axel Jantsch, Martti Forsell,
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2003
Where VLSID
Authors Juha-Pekka Soininen, Axel Jantsch, Martti Forsell, Antti Pelkonen, Jari Kreku, Shashi Kumar
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