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SIES
2009
IEEE

A flexible design flow for software IP binding in commodity FPGA

14 years 1 months ago
A flexible design flow for software IP binding in commodity FPGA
— Software intellectual property (SWIP) is a critical component of increasingly complex FPGA based system on chip (SOC) designs. As a result, developers want to ensure that their SWIP sources are protected from being exposed to an unauthorized party and are restricted to run only on a trusted FPGA platform. This paper proposes a novel design flow for protecting SWIP by binding it to a specific FPGA platform. We accomplish this by leveraging the qualities of a Physical Unclonable Function (PUF) and a tight integration of hardware and software security features. A prototype implementation demonstrates our design flow to successfully protect a SWIP by encryption using a 128 bit FPGA-unique key extracted from a PUF. Security Applications; Software Binding; Intellectual Property; Physical Unclonable Functions; FPGA
Michael Gora, Abhranil Maiti, Patrick Schaumont
Added 21 May 2010
Updated 21 May 2010
Type Conference
Year 2009
Where SIES
Authors Michael Gora, Abhranil Maiti, Patrick Schaumont
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