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ASPDAC
2009
ACM
131views Hardware» more  ASPDAC 2009»
14 years 26 days ago
A 1 GHz CMOS comparator with dynamic offset control technique
− A dynamic offset control technique that employs charge compensation by timing control is proposed for comparator design in scaled CMOS technology. The analysis has
Xiaolei Zhu, Sanroku Tsukamoto, Tadahiro Kuroda
VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 6 months ago
Controllability-driven Power Virus Generation for Digital Circuits
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekanan...