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» A CLP Approach to Modelling Systems
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RTAS
2006
IEEE
15 years 5 months ago
Bounding Preemption Delay within Data Cache Reference Patterns for Real-Time Tasks
Caches have become invaluable for higher-end architectures to hide, in part, the increasing gap between processor speed and memory access times. While the effect of caches on timi...
Harini Ramaprasad, Frank Mueller
APGV
2006
ACM
181views Visualization» more  APGV 2006»
15 years 5 months ago
Categorization of natural scenes: local vs. global information
Understanding the robustness and rapidness of human scene categorization has been a focus of investigation in the cognitive sciences over the last decades. At the same time, progr...
Julia Vogel, Adrian Schwaninger, Christian Wallrav...
ISLPED
2006
ACM
83views Hardware» more  ISLPED 2006»
15 years 5 months ago
Considering process variations during system-level power analysis
Process variations will increasingly impact the operational characteristics of integrated circuits in nanoscale semiconductor technologies. Researchers have proposed various desig...
Saumya Chandra, Kanishka Lahiri, Anand Raghunathan...
PODC
2006
ACM
15 years 5 months ago
Grouped distributed queues: distributed queue, proportional share multiprocessor scheduling
We present Grouped Distributed Queues (GDQ), the first proportional share scheduler for multiprocessor systems that scales well with a large number of processors and processes. G...
Bogdan Caprita, Jason Nieh, Clifford Stein
KBSE
2005
IEEE
15 years 5 months ago
Determining the cost-quality trade-off for automated software traceability
Major software development standards mandate the establishment of trace links among software artifacts such as requirements, architectural elements, or source code without explici...
Alexander Egyed, Stefan Biffl, Matthias Heindl, Pa...
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