334 search results - page 20 / 67 » A Case for Deconstructing Hardware Transactional Memory Syst... |
MICRO
2008
IEEE
15 years 4 months ago
2008
IEEE
Hardware signatures have been recently proposed as an efficient mechanism to detect conflicts amongst concurrently running transactions in transactional memory systems (e.g., Bulk...
108
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ISCA
2012
IEEE
13 years 2 days ago
2012
IEEE
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
164
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ASPLOS
2009
ACM
15 years 10 months ago
2009
ACM
A minimal, bounded hardware transactional memory implementation significantly improves synchronization performance when used in an operating system kernel. We add HTM to Linux 2.4...
166
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SIGMOD
2008
ACM
15 years 9 months ago
2008
ACM
Online Transaction Processing (OLTP) databases include a suite of features -- disk-resident B-trees and heap files, locking-based concurrency control, support for multi-threading ...
86
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ASPLOS
2010
ACM
15 years 4 months ago
2010
ACM
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...