Sciweavers

213 search results - page 6 / 43
» A Case for Visualization-Integrated System-Level Design Spac...
Sort
View
RSP
2006
IEEE
120views Control Systems» more  RSP 2006»
15 years 3 months ago
A Case Study of Design Space Exploration for Embedded Multimedia Applications on SoCs
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
Isabelle Hurbain, Corinne Ancourt, François...
CODES
2001
IEEE
15 years 1 months ago
Exploring design space of parallel realizations: MPEG-2 decoder case study
Basant Kumar Dwivedi, Jan Hoogerbrugge, Paul Strav...
IPPS
2003
IEEE
15 years 2 months ago
System-Level Modeling of Dynamically Reconfigurable Hardware with SystemC
To cope with the increasing demand for higher computational power and flexibility, dynamically reconfigurable blocks become an important part inside a system-on-chip. Several meth...
Antti Pelkonen, Kostas Masselos, Miroslav Cup&aacu...
96
Voted
ICCD
2006
IEEE
128views Hardware» more  ICCD 2006»
15 years 6 months ago
Polaris: A System-Level Roadmap for On-Chip Interconnection Networks
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
Vassos Soteriou, Noel Eisley, Hangsheng Wang, Bin ...
CODES
2006
IEEE
15 years 3 months ago
Yield prediction for architecture exploration in nanometer technology nodes: : a model and case study for memory organizations
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
Antonis Papanikolaou, T. Grabner, Miguel Miranda, ...