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» A Comparative Framework for Design Recovery Tools
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CODES
2006
IEEE
15 years 3 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
GLVLSI
2007
IEEE
106views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Floorplan repair using dynamic whitespace management
We describe an efficient, top-down strategy for overlap removal and floorplan repair which repairs overlaps in floorplans produced by placement algorithms or rough floorplanni...
Kristofer Vorwerk, Andrew A. Kennings, Doris T. Ch...
APVIS
2001
14 years 11 months ago
View Coordination Architecture for Information Visualisation
A view is a particular visual representation of a data set. Complex data sets typically require multiple views, each revealing a different aspect of the data. Coordinating the beh...
Tim Pattison, Matthew Phillips
IADIS
2004
14 years 11 months ago
A New Performance Evaluation Technique for Web Information Retrieval Systems
The performance evaluation of an information retrieval system is a decisive aspect for the measure of the improvements in search technology. Our work intends to provide a framewor...
Fidel Cacheda, Francisco Puentes, Victor Carneiro
ICDE
2012
IEEE
267views Database» more  ICDE 2012»
13 years 2 days ago
Scalable and Numerically Stable Descriptive Statistics in SystemML
—With the exponential growth in the amount of data that is being generated in recent years, there is a pressing need for applying machine learning algorithms to large data sets. ...
Yuanyuan Tian, Shirish Tatikonda, Berthold Reinwal...