Abstract. This paper proposes an architecture that combines a contextswitching virtual configware/software SAT solver with an embedded processor to promote a tighter coupling betwe...
C. J. Tavares, C. Bungardean, G. M. Matos, Jos&eac...
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...
This paper describes a new method of executing a software program on an FPGA for embedded systems. Rather than combine reconfigurable logic with a microprocessor core, this method...
In this paper, we are concerned about the performance estimation of bus-based architectures assuming that the task partitioning on the processing components is already determined....
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...