233 search results - page 43 / 47 » A Counterflow Pipeline Experiment |
129
click to vote
MICRO
2005
IEEE
15 years 7 months ago
2005
IEEE
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
ISCA
2003
IEEE
15 years 7 months ago
2003
IEEE
Value prediction exploits localities in value streams. Previous research focused on exploiting two types of value localities, computational and context-based, in the local value h...
104
click to vote
FP
1989
15 years 5 months ago
1989
This paper reports an explanation of an intricate algorithm in the terms of a potentially mechanisable rigorous-development method. It uses notations and techniques of Sheeran 1] ...
126
Voted
EMSOFT
2006
Springer
15 years 5 months ago
2006
Springer
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
112
Voted
CASES
2001
ACM
15 years 5 months ago
2001
ACM
The general purpose processor has long been the focus of intense optimization efforts that have resulted in an impressive doubling of performance every 18 months. However, recent ...