714 search results - page 73 / 143 » A Decompression Architecture for Low Power Embedded Systems |
80
Voted
ISCAS
2005
IEEE
15 years 6 months ago
2005
IEEE
Abstract- This paper describes the implementation of an areaefficient and protected user memory-mapped network interface, the pbuf (Parcel Buffer), for the Data IntensiVe Architect...
107
Voted
RTAS
2005
IEEE
15 years 6 months ago
2005
IEEE
We present an on-line Dynamic Voltage Scaling (DVS) algorithm for preemptive fixed-priority real-time systems called low power Limited Demand Analysis with Transition overhead (l...
125
Voted
FPL
2006
Springer
15 years 4 months ago
2006
Springer
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
CDES
2006
15 years 2 months ago
2006
Fast Fourier Transform (FFT) is one of the most widely used algorithms in digital signal processing. It is used in many signal processing and communication applications. many of t...
143
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PVM
1997
Springer
15 years 4 months ago
1997
Springer
The extremely low latencies and high bandwidth results achievable with the Scalable Coherent Interface SCI at lowest level encourages its integration into existing Message Passin...