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ICCAD
2005
IEEE
100views Hardware» more  ICCAD 2005»
15 years 9 months ago
Performance-centering optimization for system-level analog design exploration
In this paper we propose a novel analog design optimization methodology to address two key aspects of top-down system-level design: (1) how to optimally compare and select analog ...
Xin Li, Jian Wang, Lawrence T. Pileggi, Tun-Shih C...
92
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ECRTS
2005
IEEE
15 years 6 months ago
Non-Preemptive Interrupt Scheduling for Safe Reuse of Legacy Drivers in Real-Time Systems
Low-level support of peripheral devices is one of the most demanding activities in a real-time operating system. In fact, the rapid development of new interface boards causes a tr...
Tullio Facchinetti, Giorgio C. Buttazzo, Mauro Mar...
139
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FIDJI
2003
Springer
15 years 5 months ago
Hard Real-Time Implementation of Embedded Software in JAVA
The popular slogan ”write once, run anywhere” effectively renders the expressive capabilities of the Java programming framework for developing, deploying, and reusing target-i...
Jean-Pierre Talpin, Abdoulaye Gamatié, Davi...
ASPDAC
2009
ACM
249views Hardware» more  ASPDAC 2009»
15 years 5 months ago
Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model
— This paper proposes the first automatic approach to simultaneously generate Cycle Accurate and Cycle Count Accurate transaction level bus models. Since TLM (Transaction Level M...
Chen Kang Lo, Ren-Song Tsay
MEMOCODE
2010
IEEE
14 years 10 months ago
LTSs for translation validation of (multi-clocked) SIGNAL specifications
Design of critical embedded systems demands for guarantees on the reliability of the implementation/compilation of a specification. In general, this guarantee takes either the form...
Julio C. Peralta, Thierry Gautier, Loïc Besna...