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JCSC
2007
48views more  JCSC 2007»
14 years 9 months ago
A Design for Verification Approach Using an Embedding of PSL in aSML
Amjad Gawanmeh, Sofiène Tahar, Haja Moinude...
FDL
2007
IEEE
15 years 1 months ago
Towards Assertion Based Verification of Analog and Mixed Signal Designs Using PSL
Abstract-- Analog and Mixed Signal (AMS) designs are important integrated systems that link digital circuits to the analog world. Following the success of PSL verification methodol...
Ghiath Al Sammane, Mohamed H. Zaki, Zhi Jie Dong, ...
LPAR
2010
Springer
14 years 7 months ago
Synthesis of Trigger Properties
In automated synthesis, we transform a specification into a system that is guaranteed to satisfy the specification. In spite of the rich theory developed for temporal synthesis, l...
Orna Kupferman, Moshe Y. Vardi
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
15 years 1 months ago
On the Design and Verification Methodology of the Look-Aside Interface
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Moha...
ECBS
2010
IEEE
209views Hardware» more  ECBS 2010»
15 years 2 months ago
Continuous Verification of Large Embedded Software Using SMT-Based Bounded Model Checking
The complexity of software in embedded systems has increased significantly over the last years so that software verification now plays an important role in ensuring the overall pr...
Lucas Cordeiro, Bernd Fischer 0002, João Ma...