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» A Distributed Performance Analysis Architecture for Clusters
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123
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IEEEPACT
2009
IEEE
15 years 10 months ago
Interprocedural Load Elimination for Dynamic Optimization of Parallel Programs
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
Rajkishore Barik, Vivek Sarkar
133
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SIGMETRICS
2005
ACM
150views Hardware» more  SIGMETRICS 2005»
15 years 9 months ago
An analytical model for multi-tier internet services and its applications
- Since many Web applications employ a multi-tier architecture, in this paper, we focus on the problem of analytically modeling the behavior of such applications. We present a mode...
Bhuvan Urgaonkar, Giovanni Pacifici, Prashant J. S...
144
Voted
SIGMOD
2011
ACM
210views Database» more  SIGMOD 2011»
14 years 6 months ago
A platform for scalable one-pass analytics using MapReduce
Today’s one-pass analytics applications tend to be data-intensive in nature and require the ability to process high volumes of data efficiently. MapReduce is a popular programm...
Boduo Li, Edward Mazur, Yanlei Diao, Andrew McGreg...
151
Voted
CCGRID
2009
IEEE
15 years 10 months ago
BLAST Application with Data-Aware Desktop Grid Middleware
—There exists numerous Grid middleware to develop and execute programs on the computational Grid, but they still require intensive work from their users. BitDew is made to facili...
Haiwu He, Gilles Fedak, Bing Tang, Franck Cappello
124
Voted
IPPS
2007
IEEE
15 years 10 months ago
Fast SEU Detection and Correction in LUT Configuration Bits of SRAM-based FPGAs
1 FPGAs are an appealing solution for the space-based remote sensing applications. However, in a low-earth orbit, configuration bits of SRAM-based FPGAs are susceptible to single-e...
Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas A...