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» A Dynamic Multithreading Processor
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ASPDAC
2009
ACM
110views Hardware» more  ASPDAC 2009»
15 years 9 months ago
A software solution for dynamic stack management on scratch pad memory
Abstract— In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed instead of caches, which can consume majority of processor power. Howe...
Arun Kannan, Aviral Shrivastava, Amit Pabalkar, Jo...
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
15 years 10 days ago
Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
Michael Steffen, Joseph Zambreno
CSFW
2006
IEEE
15 years 8 months ago
Securing Interaction between Threads and the Scheduler
The problem of information flow in multithreaded programs remains an important open challenge. Existing approaches to specifying and enforcing information-flow security often su...
Alejandro Russo, Andrei Sabelfeld
DSD
2002
IEEE
90views Hardware» more  DSD 2002»
15 years 7 months ago
Simplifying Instruction Issue Logic in Superscalar Processors
Modern microprocessors schedule instructions dynamically in order to exploit instruction-level parallelism. It is necessary to increase instruction window size for improving instr...
Toshinori Sato, Itsujiro Arita
IPPS
2007
IEEE
15 years 8 months ago
On the Path to Enable Multi-scale Biomolecular Simulations on PetaFLOPS Supercomputer with Multi-core Processors
1 Biological processes occurring inside cell involve multiple scales of time and length; many popular theoretical and computational multi-scale techniques utilize biomolecular simu...
Sadaf R. Alam, Pratul K. Agarwal