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IPPS
2007
IEEE
15 years 11 months ago
A Grid-enabled Branch and Bound Algorithm for Solving Challenging Combinatorial Optimization Problems
Solving optimally large instances of combinatorial optimization problems requires a huge amount of computational resources. In this paper, we propose an adaptation of the parallel...
Mohand-Said Mezmaz, Nouredine Melab, El-Ghazali Ta...
IPPS
2006
IEEE
15 years 11 months ago
An adaptive system-on-chip for network applications
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...
139
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ECRTS
2005
IEEE
15 years 10 months ago
A WCET-Oriented Static Branch Prediction Scheme for Real Time Systems
Branch prediction mechanisms are becoming commonplace within current generation processors. Dynamic branch predictors, albeit able to predict branches quite accurately in average,...
François Bodin, Isabelle Puaut
SC
2005
ACM
15 years 10 months ago
An Application-Based Performance Characterization of the Columbia Supercluster
Columbia is a 10,240-processor supercluster consisting of 20 Altix nodes with 512 processors each, and currently ranked as one of the fastest computers in the world. In this paper...
Rupak Biswas, M. Jahed Djomehri, Robert Hood, Haoq...
MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
15 years 10 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...