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» A Framework for Scheduler Synthesis
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FPGA
2009
ACM
154views FPGA» more  FPGA 2009»
15 years 8 months ago
Synthesis of reconfigurable high-performance multicore systems
Reconfigurable high-performance computing systems (RHPC) have been attracting more and more attention over the past few years. RHPC systems are a promising solution for accelerati...
Jason Cong, Karthik Gururaj, Guoling Han
ICCAD
2000
IEEE
188views Hardware» more  ICCAD 2000»
15 years 6 months ago
Bus Optimization for Low-Power Data Path Synthesis Based on Network Flow Method
— Sub-micron feature sizes have resulted in a considerable portion of power to be dissipated on the buses, causing an increased attention on savings for power at the behavioral l...
Sungpack Hong, Taewhan Kim
ESTIMEDIA
2008
Springer
15 years 3 months ago
A framework for memory-aware multimedia application mapping on chip-multiprocessors
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
Luis Angel D. Bathen, Nikil D. Dutt, Sudeep Pasric...
EUROMICRO
2000
IEEE
15 years 6 months ago
Task Assignment and Scheduling under Memory Constraints
Many DSP and image processing embedded systems have hard memory constraints which makes it difficult to find a good task assignment and scheduling which fulfill these constrain...
Radoslaw Szymanek, Krzysztof Kuchcinski
DAC
2009
ACM
16 years 2 months ago
Quality-driven synthesis of embedded multi-mode control systems
At runtime, an embedded control system can switch between alternative functional modes. In each mode, the system operates by using a schedule and controllers that exploit the avai...
Soheil Samii, Petru Eles, Zebo Peng, Anton Cervin