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204
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CODES
2007
IEEE
16 years 1 months ago
A code-generator generator for multi-output instructions
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
Hanno Scharwächter, Jonghee M. Youn, Rainer L...
192
Voted
CVPR
2007
IEEE
16 years 1 months ago
Hierarchical Structuring of Data on Manifolds
Manifold learning methods are promising data analysis tools. However, if we locate a new test sample on the manifold, we have to find its embedding by making use of the learned e...
Jun Li, Pengwei Hao
ECRTS
2007
IEEE
16 years 1 months ago
A Delay Composition Theorem for Real-Time Pipelines
Uniprocessor schedulability theory made great strides, in part, due to the simplicity of composing the delay of a job from the execution times of higher-priority jobs that preempt...
Praveen Jayachandran, Tarek F. Abdelzaher
185
Voted
FOCS
2007
IEEE
16 years 1 months ago
A Primal-Dual Randomized Algorithm for Weighted Paging
In the weighted paging problem there is a weight (cost) for fetching each page into the cache. We design a randomized O(log k)-competitive online algorithm for the weighted paging...
Nikhil Bansal, Niv Buchbinder, Joseph Naor
171
Voted
GLVLSI
2007
IEEE
171views VLSI» more  GLVLSI 2007»
16 years 1 months ago
Combinational equivalence checking for threshold logic circuits
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevo...
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